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With ARM Cortex-M3, such as NXP LPC 1788, why would anyone use the interrupt set-pending register (S)

Or interrupt clear-pending registers?

Can anyone provide a simple, legal example of using these registers?

In case of sole use, I can think that triggering low-priority software expansion is high priority IRQHandler Similar to GPIO interrupt handlers

Normally you will use PendSV for this, but when you have more than one work or priority level, then you use any unused circumference exception vector can do. Sleep-on-opt-out can be useful in programs using the facility - where AOCC will run only in exception handlers. 

  For example LPC17xx zero ETHERNET_Handler (zero) {// Toggle LED P0.4 LPC_GPIO0-> FIODIR0 ^ = (1

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